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Written by Aparna Joshi   
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Definition of Yield
Semiconductor Yield
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What is Yield?

Yield is a number which generally quantifies the success. If I put 10 hours of work and got a work done which is worth 8 hours. Then my work yield is 8/10 that is 80%. Or if I am a manufacture of pens. I started making 1000 pens. 50 broke while adding ink refills in them, 50 broke while moving the box of ready pens to quality check and finally, quality department threw 100 pens as they were not writing. At the end, I could sell only 800 pens. My production yield is 800/1000 that is 80%. How do I improve Yield? This is a very important task yet very difficult to accomplish. Actions contribute in keeping up good yield are,

  • Defining critical areas
  • Keeping and updating the ideal or golden data
  • Reporting collected data in a right form
  • Analyzing periodic reports
It is always beneficial to find the problem sooner. The manufacturing cost increases towards the final steps of production. General steps towards yield improvement can be as follows:
  • Collect data at every critical step of production cycle
  • Compare data with ideal data or expected values
  • Analyze the findings and pin point the possible causes of failures
  • Identify the most effective solution
  • Apply the solution to a controlled material
  • Collect the data and verify the results
  • Roll out the solution to production

Use of data analysis tools is very helpful in these situations. Choosing the right tool is very important. To capture all the aspects of manufacturing, integration of the tool is critical.



Semiconductor Yield

Semiconductor yield briefly comprises of PCM level yield, probe yield and packaged parts yield.

What is PCM data and yield?

PCM data stands for Process Control Monitoring. The data collected at the end of actual wafer fabrication process is called PCM data. It is also known as WAT (Wafer AcceptanceTest), ET (Electrical Test), Kerf data. This data is collected on the test structures placed at predefined test-sites of the wafer. Typically, one set of test structures is placed for every reticule (area covered by one lithography exposure) and a subset of these is tested. In many cases, this is the first measure of 'goodness' of the wafer as viewed by a customer. Although the data is limited, its evaluation is essential because it can provide an early warning of a potential problem that may happen after expensive operations such as test and assembly. PCM Yield is defined as the Total number of passed test-sites divided by the Total number of measured test-sites.

What is Probe or Wafer Sort data and yield?

Once it is confirmed that the PCM data is acceptable, each wafer is sent to test individual chips using automated testers (ATE). This operation is known as wafer probe or wafer sort. Whereas PCM data provides an indication of acceptability of the wafer fabrication process, probe data indicates whether a chip meets functional specifications. Chips not meeting the specifications are declared as Fails and are skipped from the subsequent expensive assembly process. In many cases, wafer sort can reveal a subtle weakness in manufacturing process that may not be caught by PCM.Some such problems can be caught by correlation between probe and PCM data. Probe Yield is defined as Total number of passed chips divided by Total number of tested chips.

What is Final Test or Packaged parts data and yield?

A wafer on which passing chips are identified is sent for assembly. Wafers are grinded to a desired thickness and singulated to separate out chips. Chips that are identified as Pass by wafer probe are then packaged. Another cycle of testing is performed at this stage. It is very important to test this packaged chip because the end user will be using this chip directly in the desired application. Final Test Yield is defined as Total number of chips passed divided by Total number of chips tested. (Poor tester correlation or equipment alignment issues can sometimes result in false failure of an otherwise good chip. These failing chips are recovered during re-test. One needs to be careful in how such chips are accounted for in yield calculation.) A true failure of a chip at this stage can be due to damage during assembly process or due to subtle process issues (e.g. RF parameters) that are not caught by PCM or probe tests.

 

All the definitions of yield and data are generic. Companies may have different ways of calculating yield suitable to their manufacturing processes and business practices. Ospice Inc. does not claim any definition is better or more accurate than the other.

 
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